University of Sargodha ADP/BS 2"d Semester (F-24) Examination 2025 Subject: CS/IT/SE Paper: Digital Logic Design (CMPC-5204)
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University of Sargodha
ADP/BS 2"d Semester (F-24) Examination 2025
Subject: CS/IT/SE
Paper: Digital Logic Design (CMPC-5204)
Time Allowed: 02:30 Hours
Maximum Marks: 40
Note:
Objective part is compulsory. Attempt any three questions from subjective part.
(Illustrate your answer with diagram where needed).
Objeetive Part (Compulsory)
Q.1. Write short answers of the following in 2-3 lines each on your answer sheer stadni.com
Represent the decimal number 6,248 in BCD.
iiv
iii.
Find the complement of the functions.F = xyZ + yz).
Demonstrate the validity of the following identities by means of truth tables: DeMorgan's theorem
for three variables:
(x+ Y +Z) = (XYZ)
ir.
v.
vi.
vi:
vili.
Why we use K-Map?
What is Multiplexer?
What is Complements theorem?
Define don't-care conditions.
What is a carry propagate adder?
Q.4.
0.5.
Q.6.
Subjective Part
(8*3)
Draw logic diagram of four-to-one-line multiplexer.
Draw the circuit diagram of half adder and full adder. Draw truth table of half adder. Also write
Boolean expression of half adder only. Show how a full adder can be converted to a full subtracter?
Draw seven segment logic diagram and its truth table.
Simplify the following Boolean functions, using Karnaugh maps
F (4, B, C,
D) = Z (4, 6, 7, 15).
Draw the following circuit with NANDs and NORs only.
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