University of Sargodha Subject: IT/CS BS 2n" Semester (E-24) Examination 2025 Paper: Digital Logic Design (ITSC-102/CMP-2210)

University of Sargodha

Subject: IT/CS

BS 2n" Semester (E-24) Examination 2025

Paper: Digital Logic Design (ITSC-102/CMP-2210)

Time Allowed: 02:30 Hours

Maximum Marks: 60

Note: Objective part is compulsory. Attempt any three questions from subjective part.

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Objective Part (Compulsory)

Write short answers of the followine in 2-3 lines each on your answer sheet

• Define BCD code. Give an example of converting decimal 27 into BCD.

Implement an OR gate using only NAND gates.

Simplify the Boolean function F=AB+A'B+AB.

Explain the difference between a combinational circuit and a sequential circuit.

v:

vi.

ViI.

vili.

ix.

x.

XI.

xii.

How multiplexer is different from demultiplexer?

Define setup time and hold time in flip-flops.

Differentiate between EPROM and EEPROM.

What is the role of Karnaugh Maps in simplifying Boolean expressions dini.COm

Draw a 3-bit binary up counter.

What is FPGA? Mention one application.

What is a modulus of a counter? Give an example.

What is the function of a decoder? Give one practical application.

(2*12)

Q.2.

Subjective Part (3*12)

Explain the process of converting a decimal number into binary, octal, and hexadecimal with a suitable

Q.3.

Q.4.

Q.5.

Q.6.

example.

Use a Karnaugh Map to minimize the Boolean function:

(a) F(A,B,C,D)=2(1,3,4,5,7,9,11,15)

(b) F(W,X,Y,Z)=2(0,2,5,7,8,10,13,15).

Prove that NAND and NOR gates are universal gates. Show implementation of AND, OR, and NOT

gates using NAND only.

Design a 3-bit asynchronous binary counter using T flip-flops. Draw the logic diagram and timing

waveforms.

Differentiate between serial-in/parallel-out and parallel-in/serial-out shift registers. Draw block

diagrams for both.

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.... LK-7060/19-11-25 --

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