Digital logic Design ADP/BS 2 Semester/Term University Of Sargodha (UOS) 2025

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Subject: CS/IT/SE Paper: Digital Logic Design (CMPC-5204)

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Time Allowed: 02:30 Hours Jawes \A \ u\\ Maximum Marks; 49

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Q.1. Write short answers of the following in 2-3 lines each on your answer sheet. - (2*8)

i. Represent the decimal number 6,248 in BCD& [Y

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ii. Find the complement of the functions.F = x(yZ + yz)B

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iii. Demonstrate the validity of the following identities by means of truth tables: DeMorgan’s theorem

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iv. Why we use K-Map?

“ v. What is Multiplexer? jy

vi. What is Complements theorem? §

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vii. Define don’t-care conditions.

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viii. What is a carry propagate adder? y

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"Note: Objective part is compulsory. Attempt any three questions fr

viii. ~~ What is a carry propagate adder? J

University of Sargodha

ADP/BS 2"d Semester (F-24) Examination 2025

Time Allowed: 02:30 Hours Joawetsia Gul Maximum Marks;

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Objective Part (Compulsory) él AN

(Illustrate your answer with diagram where needed).

Q.1. Write short answers of the following in 2-3 lines each on your answer sheet, -

i. Represent the decimal number 6,248 in BCD#& Y

ii. Find the complement of the functions.F = x(7Z + yz)&

iii. Demonstrate the validity of the following identities by means of truth tables: DeMorgan’s theorem

for three variables: (X+Y +2) = (XY Z)}

iv. Why we use K-Map?

v. What is Multiplexer?

vii. Define don’t-care conditions.

(2*8)

Subjective Part (8%3)

Q.2. Draw logie diagram of four-to-one-line multiplexer. 9 2

Q.3. Draw the circuit diagram of half adder and full adder. Draw truth table of half adder. Also write

Boolean expression of half adder only. Show how a full adder can be converted to a full subtracter?

Q.4C Draw seven segment logic diagram and its truth table. k

Q.5. Simplify the following Boolean functions, using Karnaugh maps Q

F(4,B,C,D)=} (4,6,7, 15).

Q.6. Draw the following circuit with NANDs and NORs only. &

LK-9293/18-11-25 ~~

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