Ustadni
Upload paper
Home /University Of Sargodha (UOS) /Computer Architecture

University of Sargodha BS 6t* Term Examination 2015 Subject: Computer Science Paper: Computer Architecture (CS-420) Time Allowed: 2:30 Hours Maximum Marks: 80 0.1

University of Sargodha BS 6t* Term Examination 2015 Subject: Computer Science Paper: Computer Architecture (CS-420) Time Allowed: 2:30 Hours Maximum Marks: 80 0.1 — page 1

Discussion

Ask a question about this paper, or help someone else with theirs. Answers are emailed to whoever asked.

Your email is only used to send you replies and occasional Ustadni updates. It is never shown publicly.

Log in to post under your name

No questions yet — be the first to ask.

More Computer Architecture papers

See all
Computer Architecture BSCS 2014 UOS Computer Architecture BSCS 2014 UOS University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓ Computer Architecture BSCS 2018 UOS Computer Architecture BSCS 2018 UOS University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓ Computer Architecture BSCS 2016 UOS Computer Architecture BSCS 2016 UOS University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓ University of Sargodha BS 4** Term Examination 2017. Subject: Computer Science Paper: Computer Architecture (CS:4240) Time Alloweds 2:30 Hours Maximum Marks: 80 (VID University of Sargodha BS 4** Term Examination 2017. Subject: Computer Science Paper: Computer Architecture (CS:4240) Time Alloweds 2:30 Hours Maximum Marks: 80 (VID University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓ University of Sargodha BS 4* Term Examination 2017. Subjects Computer Science Paper: Computer Architecture (CS:4240) Time Allowed: 2:30 Hours Maximum Marks: 80 Objective Part University of Sargodha BS 4* Term Examination 2017. Subjects Computer Science Paper: Computer Architecture (CS:4240) Time Allowed: 2:30 Hours Maximum Marks: 80 Objective Part University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓ University of Sargodha BS 4** Term Examination 2015 Subject: Computer Science Paper: Computer Architecture (CS-4240) Time Allowed: 2:30 Hours istadni.co Maximum Marks: 80 University of Sargodha BS 4** Term Examination 2015 Subject: Computer Science Paper: Computer Architecture (CS-4240) Time Allowed: 2:30 Hours istadni.co Maximum Marks: 80 University Of Sargodha (UOS) · BSCS Uploaded 3 years ago Download ↓

Paper text

University of Sargodha

BS 6t* Term Examination 2015

Subject: Computer Science Paper: Computer Architecture (CS-420)

Time Allowed: 2:30 Hours

Maximum Marks: 80

0.1

Objective Part

(Compulsory)

Note: Attempt all questions each question carry equal marks?

(16 x2)c°

* If bus clock rate is 133 MHZ, then what will be length of a bus cycle?

iN What is memory interleaving?

iiit Name different types of buses used in computer.

iv. Differentiate between CISC machines to RISC machines.

V. What do you mean by interrupts?

vi. What is difference between MBR and MAR?

vii. What do you mean by load store architecture?

vili If MARIE has 16K words of main memory, then how many address bits are necessary?

ix+What do you mean by effective address of a memory?

X.M Discuss store instruction in MIPS architecture with a suitable example.

xi. '

Write down only machine instruction format of j-type instruction in MIPS.

xii.

If a byte-addressable machine with 32-bit words stores the hex value 123ABC78, indicate

how this value would be stored on a little endian machine.

xili& Write down the formula to compute the execution time of a program.

xive What do you mean by data hazard?

xv. Explain the advantages of pipelined microprocessors.

xvi. What is miss rate in memory performance analysis?

Subjective Part

(3x16)

Note: Attempt any three questions. All questions carry equal marks

Q. 2 Explain the steps in the fetch-decode-execute cycle. Your explanation should inelude what is

happening in the various registers.

Q. 3 Discuss different addressing modes in MIPS Architecture.

Q. 4 How load instruction is executed in single cycle microarchitecture and also draw block diagram.

Q. 5 Discuss different types of hazards in pipelined processors with suitable examples.

Q. 6 Discuss in detail mapping of main memory to direct mapped Cache.

visit website: ustadni.com