University of Sargodha BS 2nd Term Examination 2019 Subject: Computer Science Paper: Digital Logic Design (CMP-2210) Time Allowed: 2:30 Hours Maximum Marks: 80

University of Sargodha

BS 2nd Term Examination 2019

Subject: Computer Science

Paper: Digital Logic Design (CMP-2210)

Time Allowed: 2:30 Hours

Maximum Marks: 80

monte beis part is computer, tempt any tre auctions from subjectre pure.

Objective Pary (Compulsory)

Q.1.

Write short answers of the following in 2-3 lines each on your answer sheet.

i: Convert the given number (144)g into binary?

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(16*2)

ii! Use10's complement to perform M-N when

M-85320 apdN=51360

ili: Write the following function into maxterms F=Z(2,4,5,6)

iv: State Duality principle?

V.

Using postulates and theorems of Boolean algebra prove

x+xy=x

vi: Simplify the following Boolean function using k-map

vii.

F(A,B)=A'B' +AB'+AB

Draw the Truth table of half subtractor and write the Boolean function for its Borrow and

Difference?

vili:

What is the multiplexer?

ix:

Draw the logic circuit which performs addition between two input values?

X:

Define Register and its type?

xi:

What is Karnaugh?

Obtain the I's and 2's complement of the following binary function

0010001, 0111010, 010100, 1011101

xili:

Draw the gate implementation of the following expression.

AB+A(B+C)+B(B+C)

xiv.

Prove that exclusive-OR is the compliment of exclusive-NOR?

xV. Expand the following Boolean functions into their canonical form:

(A. B,

C) = AB + A'C + AB'C

xvi.

What is 4-bit binary parallel adder?

Subjective Part

(3*16)

Q.2.

Determine the base b in each of the following cases:

(a) (361)10 =(551)ь

(b) (982)10 =(1726)6

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Q.3.

Write Boolean expressions and construct the truth tables

describing the outputs of the circuits described by the

logic diagram.

2.4.

Simplify the Boolean function

F (w, x, y, z) = Z 1, 2, 4, 5, 6, 8, 9, 12, 13, 14). Find both SOP and POS expression.

0.5.

2.6.

Draw circuit diagram of half adder and full adder. Draw truth table of half adder. Also write

xpression of half adder only. Show how a full adder can be converted to a full subtracter

What is Demuttiplexer? Explain with 2 to 4 line Decoder with enable input and define its trutt

table and block diagram?

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